STM32P0B1 G0-512K MICROCONTROLLER PROGRAMMING SERVICE OPTION LIST
                     		(Last update: February 2022, rel. 3.1)

Customer: xxxxxxxxxx
Address:  xxxxxxxxxx
          xxxxxxxxxx
Contact:  xxxxxxxxxx
Phone No: xxxxxxxxxx
Reference:xxxxxxxxxx
  
(N.B. The FASTROM code name is assigned by STMicroelectronics)
FASTROM code must be sent Intel extended format.

Device Type/Package (check only one option):
-------------|----------------|
FASTROM      |     Package    |
DEVICE       |                |
-------------|----------------|
STM32P0B1VxT |[ ]LQFP100 14x14|
STM32P0B1MxT |[ ]LQFP80  12x12|
STM32P0B1RxT |[ ]LQFP64  10x10|
STM32P0B1CxT |[ ]LQFP48   7x7 |
STM32P0B1KxT |[ ]LQFP32   7x7 |
STM32P0B1CxU |[ ]UFQFPN48 7x7 |
STM32P0B1KxU |[ ]UFQFPN32 5x5 |
STM32P0B1VxI |[ ]UFBGA100 7x7 |
STM32P0B1RxI |[ ]UFBGA64  5x5 |
STM32P0B1NxY |[ ]WLCSP52      |
-------------|----------------|


Conditioning :	[ ] Tray	[ ] Tape & Reel.

Standard Temp. Range (Please refer to datasheet for specific sales conditions): 
[  ] -40�C to +85�C  (suffix 6)
[  ] -40�C to +105�C (suffix 7)
[  ] -40-C to +125-C (suffix 3)

Special Marking:        [ ] No  [ ] Yes : "xxxxxxxx" 
(special charge apply)

In the number available 3 characters are reserved by ST for code identification

LQFP100 14x14 :  2*12 characters maximum "_ _ _ _ _ _ _ _ _ _ _ _" and " _ _ _ _ _ _ _ _ _ _ _ _"
LQFP80 12x12  :  2*11 characters maximum "_ _ _ _ _ _ _ _ _ _ _" and " _ _ _ _ _ _ _ _ _ _ _"
LQFP64 10x10  :  2*10 characters maximum "_ _ _ _ _ _ _ _ _ _" and " _ _ _ _ _ _ _ _ _ _"
LQFP48   7x7  :  2*8  characters maximum "_ _ _ _ _ _ _ _ _" and "_ _ _ _ _ _ _ _ _"
LQFP32   7x7  :  2*8  characters maximum "_ _ _ _ _ _ _ _ _" and "_ _ _ _ _ _ _ _ _"
UQFPN48 7x7   :  1*8  characters maximum "_ _ _ _ _ _ _ _" and " _ _ _ _ _ _ _ _"
UQFPN32 5x5   :  1*8  characters maximum "_ _ _ _ _ _ _ _" and " _ _ _ _ _ _ _ _"
WLCSP52       :  1*4 characters maximum "_ _ _ _"
UFBGA100 7x7  :  2*8  characters maximum "_ _ _ _ _ _ _ _" and " _ _ _ _ _ _ _ _"
UFBGA64 5x5   :  1*8  characters maximum "_ _ _ _ _ _ _ _" 

Authorized characters are letters, digits, '.', '-', '/' and spaces only. 

Device Memory Size (check only one option):
		[ ]128KB - STM32P0B1xBx
		[ ]256KB - STM32P0B1xCx
		[ ]512KB - STM32P0B1xEx

The memory size to program can be less or equal to the device memory size.

Select padding value for unused program memory :
[X]0xFFFF Fixed value
[ ]0x0F0F SVC instruction  opcode (Supervisor Call) (not available now)

Start address: 0x0800 0000   (default is flash base address 0x0800 0000)

User Option Byte:

Please join .HEX file for all OPTIONS documented in PRODUCT datasheet and resume below


[selection] 'value' "meaning"

IRHEN - Internal reset holder enable bit
  [ ] '0' "Simple pulse on NRST"       [ ] '1' "Reset drives NRST until low level"
NRST_MODE[1:0]
  [ ] '00' "Reserved"                  [ ] '01' "Reset input only"
  [ ] '10' "Standard GPIO"             [ ] '11' "Bidirectional reset / legacy mode"
nBOOT0 - Boot selection configuration
  [ ] '0' "nBOOT0 = 0"                 [ ] '1' "nBOOT0 = 1"
nBOOT1 - Boot selection configuration
  [ ] '0' "nBOOT1 = 0"                 [ ] '1' "nBOOT1 = 1"
nBOOT_SEL - Boot selection configuration
  [ ] '0' "BOOT0 defined by BOOT0 pin" [ ] '1' "BOOT0 defined by nBOOT0"
RAM_PARITY_CHECK - SRAM parity check configuration   
  [ ] '0' "Enabled"                    [ ] '1' "Disabled"
DUAL_BANK - Dual bank configuration on 512K/256K devices
  [ ] '0' "single bank"                [ ] '1' "dual bank"
nSWAP_BANK - Empty check boot configuration
  [ ] '0' "Bank 1"                     [ ] '1' "Bank 2"
WWDG_SW - Software / Hardware window watchdog activation 
  [ ] '0' "Hardware"                   [ ] '1' "Software" 
IWDG_STDBY - Independent watchdog counter freeze in Standby mode 
  [ ] '0' "Frozen"                     [ ] '1' "Running" 
IWDG_STOP - Independent watchdog counter freeze in Stop mode 
  [ ] '0' "Frozen"                     [ ] '1' "Running" 
IWDG_SW - Software / Hardware independent watchdog activation 
  [ ] '0' "Hardware"                   [ ] '1' "Software" 
nRST_SHDW - Reset generated when entering Shutdown mode
  [ ] '0' "Reset"                      [ ] '1' "No Reset" 
nRST_STDBY - Reset generated when entering Standby mode
  [ ] '0' "Reset"                      [ ] '1' "No Reset" 
nRST_STOP - Reset generated when entering Stop mode         
  [ ] '0' "Reset"                      [ ] '1' "No Reset"
BORF_LEV[1:0]
  [ ] '00' "BOR falling level 1"       [ ] '01' "BOR falling level 2"
  [ ] '10' "BOR falling level 3"       [ ] '11' "BOR falling level 4"
BORR_LEV[1:0]
  [ ] '00' "BOR rising level 1"        [ ] '01' "BOR rising level 2"
  [ ] '10' "BOR rising level 3"        [ ] '11' "BOR rising level 4"

BOR_EN - Brown out reset enable
  [ ] '0' "Disabled"                    [ ] '1' Enabled"
RDP - Read Protection configuration   
  [ ] '0xXX' Level1  [ ] '0xCC' "Level2"   [ ] '0xAA' "Disabled"

PCROP1A - Area A write protection start address
PCROP1A_STRT - bit 0 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 1 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 2 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 3 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 4 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 5 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 6 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 7 [ ] '0' [ ] '1' 
PCROP1A_STRT - bit 8 [ ] '0' [ ] '1' 

PCROP1A - Area A write protection end address
PCROP1A_END - bit 0 [ ] '0' [ ] '1' 
PCROP1A_END - bit 1 [ ] '0' [ ] '1' 
PCROP1A_END - bit 2 [ ] '0' [ ] '1' 
PCROP1A_END - bit 3 [ ] '0' [ ] '1' 
PCROP1A_END - bit 4 [ ] '0' [ ] '1' 
PCROP1A_END - bit 5 [ ] '0' [ ] '1' 
PCROP1A_END - bit 6 [ ] '0' [ ] '1' 
PCROP1A_END - bit 7 [ ] '0' [ ] '1' 
PCROP1A_END - bit 8 [ ] '0' [ ] '1' 

PCROP_RDP - PCROP area erase upon RDP regression
  [ ] '0' "Not erased"                    [ ] '1' Erased"

WRP1A - Area A write protection start byte
WRP1A_STRT - bit 0 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 1 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 2 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 3 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 4 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 5 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 6 [ ] '0' [ ] '1' 
WRP1A_STRT - bit 7 [ ] '0' [ ] '1' 

WRP1A - Area A write protection end byte
WRP1A_END - bit 0  [ ] '0' [ ] '1' 
WRP1A_END - bit 1  [ ] '0' [ ] '1' 
WRP1A_END - bit 2  [ ] '0' [ ] '1' 
WRP1A_END - bit 3  [ ] '0' [ ] '1' 
WRP1A_END - bit 4  [ ] '0' [ ] '1' 
WRP1A_END - bit 5  [ ] '0' [ ] '1' 
WRP1A_END - bit 6  [ ] '0' [ ] '1' 
WRP1A_END - bit 7  [ ] '0' [ ] '1' 

WRP1B - Area B write protection start byte
WRP1B_STRT - bit 0 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 1 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 2 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 3 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 4 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 5 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 6 [ ] '0' [ ] '1' 
WRP1B_STRT - bit 7 [ ] '0' [ ] '1' 

WRP1B - Area B write protection end byte
WRP1B_END - bit 0  [ ] '0' [ ] '1' 
WRP1B_END - bit 1  [ ] '0' [ ] '1' 
WRP1B_END - bit 2  [ ] '0' [ ] '1' 
WRP1B_END - bit 3  [ ] '0' [ ] '1' 
WRP1B_END - bit 4  [ ] '0' [ ] '1' 
WRP1B_END - bit 5  [ ] '0' [ ] '1' 
WRP1B_END - bit 6  [ ] '0' [ ] '1' 
WRP1B_END - bit 7  [ ] '0' [ ] '1' 

PCROP1B - Area B write protection start address
PCROP1B_STRT - bit 0 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 1 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 2 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 3 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 4 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 5 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 6 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 7 [ ] '0' [ ] '1' 
PCROP1B_STRT - bit 8 [ ] '0' [ ] '1' 

PCROP1B - Area B write protection end address
PCROP1B_END - bit 0 [ ] '0' [ ] '1' 
PCROP1B_END - bit 1 [ ] '0' [ ] '1' 
PCROP1B_END - bit 2 [ ] '0' [ ] '1' 
PCROP1B_END - bit 3 [ ] '0' [ ] '1' 
PCROP1B_END - bit 4 [ ] '0' [ ] '1' 
PCROP1B_END - bit 5 [ ] '0' [ ] '1' 
PCROP1B_END - bit 6 [ ] '0' [ ] '1' 
PCROP1B_END - bit 7 [ ] '0' [ ] '1' 
PCROP1B_END - bit 8 [ ] '0' [ ] '1' 

PCROP2A - Area A write protection start address
PCROP2A_STRT - bit 0 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 1 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 2 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 3 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 4 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 5 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 6 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 7 [ ] '0' [ ] '1' 
PCROP2A_STRT - bit 8 [ ] '0' [ ] '1' 

PCROP2A - Area A write protection end address
PCROP2A_END - bit 0 [ ] '0' [ ] '1' 
PCROP2A_END - bit 1 [ ] '0' [ ] '1' 
PCROP2A_END - bit 2 [ ] '0' [ ] '1' 
PCROP2A_END - bit 3 [ ] '0' [ ] '1' 
PCROP2A_END - bit 4 [ ] '0' [ ] '1' 
PCROP2A_END - bit 5 [ ] '0' [ ] '1' 
PCROP2A_END - bit 6 [ ] '0' [ ] '1' 
PCROP2A_END - bit 7 [ ] '0' [ ] '1' 
PCROP2A_END - bit 8 [ ] '0' [ ] '1' 

WRP2A - Area A write protection start byte
WRP2A_STRT - bit 0 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 1 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 2 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 3 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 4 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 5 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 6 [ ] '0' [ ] '1' 
WRP2A_STRT - bit 7 [ ] '0' [ ] '1' 

WRP2A - Area A write protection end byte
WRP2A_END - bit 0  [ ] '0' [ ] '1' 
WRP2A_END - bit 1  [ ] '0' [ ] '1' 
WRP2A_END - bit 2  [ ] '0' [ ] '1' 
WRP2A_END - bit 3  [ ] '0' [ ] '1' 
WRP2A_END - bit 4  [ ] '0' [ ] '1' 
WRP2A_END - bit 5  [ ] '0' [ ] '1' 
WRP2A_END - bit 6  [ ] '0' [ ] '1' 
WRP2A_END - bit 7  [ ] '0' [ ] '1' 

WRP2B - Area B write protection start byte
WRP2B_STRT - bit 0 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 1 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 2 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 3 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 4 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 5 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 6 [ ] '0' [ ] '1' 
WRP2B_STRT - bit 7 [ ] '0' [ ] '1' 

WRP2B - Area B write protection end byte
WRP2B_END - bit 0  [ ] '0' [ ] '1' 
WRP2B_END - bit 1  [ ] '0' [ ] '1' 
WRP2B_END - bit 2  [ ] '0' [ ] '1' 
WRP2B_END - bit 3  [ ] '0' [ ] '1' 
WRP2B_END - bit 4  [ ] '0' [ ] '1' 
WRP2B_END - bit 5  [ ] '0' [ ] '1' 
WRP2B_END - bit 6  [ ] '0' [ ] '1' 
WRP2B_END - bit 7  [ ] '0' [ ] '1' 

PCROP2B - Area B write protection start address
PCROP2B_STRT - bit 0 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 1 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 2 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 3 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 4 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 5 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 6 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 7 [ ] '0' [ ] '1' 
PCROP2B_STRT - bit 8 [ ] '0' [ ] '1' 

PCROP2B - Area B write protection end address
PCROP2B_END - bit 0 [ ] '0' [ ] '1' 
PCROP2B_END - bit 1 [ ] '0' [ ] '1' 
PCROP2B_END - bit 2 [ ] '0' [ ] '1' 
PCROP2B_END - bit 3 [ ] '0' [ ] '1' 
PCROP2B_END - bit 4 [ ] '0' [ ] '1' 
PCROP2B_END - bit 5 [ ] '0' [ ] '1' 
PCROP2B_END - bit 6 [ ] '0' [ ] '1' 
PCROP2B_END - bit 7 [ ] '0' [ ] '1' 
PCROP2B_END - bit 8 [ ] '0' [ ] '1' 

SEC_SIZE2[7:0] - Securable memory area size, Bank 2
SEC_SIZE2 - bit 0 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 1 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 2 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 3 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 4 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 5 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 6 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 7 [ ] '0' [ ] '1' 
SEC_SIZE2 - bit 8 [ ] '0' [ ] '1' 

BOOT_LOCK - Used to force boot from user area
  [ ] '0' "Boot based on pad/opt config"   [ ] '1' Boot forced from Main Flash memory"

SEC_SIZE[7:0] - Securable memory area size, Bank 1
SEC_SIZE - bit 0 [ ] '0' [ ] '1' 
SEC_SIZE - bit 1 [ ] '0' [ ] '1' 
SEC_SIZE - bit 2 [ ] '0' [ ] '1' 
SEC_SIZE - bit 3 [ ] '0' [ ] '1' 
SEC_SIZE - bit 4 [ ] '0' [ ] '1' 
SEC_SIZE - bit 5 [ ] '0' [ ] '1' 
SEC_SIZE - bit 6 [ ] '0' [ ] '1' 
SEC_SIZE - bit 7 [ ] '0' [ ] '1' 
SEC_SIZE - bit 8 [ ] '0' [ ] '1' 

Please refer to the device reference manual for more information.



Date               		Signature   . . . . . . . . . . . . . .

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