CadenceLIVE 2023
Meet us on August 9-10, 2023, at the– Hotel Radisson Blu in– Bangalore, India
CadenceLIVE: solutions for today's design challenges, which will impact tomorrow's products
CadenceLIVE (formerly known as CDNLive) is Cadence's annual conference held in nine different locations worldwide. In India, it has been one of the most significant technology events since its first edition in 2005. CadenceLIVE brings together users, developers, and industry experts to connect, share ideas, and inspire design creativity. The conference showcases the latest advancements in semiconductor design and system solutions.
STMicroelectronics will be showcasing the unique innovative methodology developed around the Cadence tools in several presentations. Find out more below.
| DIGITAL DESIGN AND IMPLEMENTATION | ||
| Date/Time | Title | Presenters/Authors |
| Aug 9th 2023 11:45am – 12:15pm | DCLS Implementation and Verification with USF for Automotive Chips | ST Presenter: Deepika Madaan Cadence author: Harshal Ambatkar |
| DIGITAL DESIGN ADVANCEMENT WITH AI | ||
| Date/Time | Title | Presenters/Authors |
| Aug 9th 2023 3:25pm – 3:55pm | Leakage Power Recovery with Cadence Cererbus VTOpt and PPA Exploration | ST Presenter: Hemasundar Batta ST author: Deepika Madaan Cadence author: Harshal Ambatkar |
| CUSTOM AND ANALOG DESIGN: IMPLEMENTATION | ||
| Date/Time | Title | Presenters/Authors |
| Aug 9th 2023 11:45am – 12:15pm | Improved Productivity and Quality of Layout Designs with Virtuoso Studio | ST Presenter: Deep Shikha ST authors: Devendra Gupta, Prachi Solanki, Rajeev Singh Cadence authors: Akshita Bansal, Vishesh Kumar |
| Aug 9th 2023 4:15pm – 4:45pm | Symmetric and Interactive Signoff Metal Fill for Parasitic Sensitive Analog IPs in Virtuoso Studio | ST Presenter: Monika Lilani ST author: Atul Bhargava Cadence author: Sahab Abdul Hadi, Efim Shumilov, Vishesh Kumar |
| HARDWARE AND SYSTEM VERIFICATION | ||
| Date/Time | Title | Presenters/Authors |
| Aug 10th 2023 2:05pm – 2:35pm | Complex Interconnect Verification and System Performance Analysis at SoC Using System VIP | ST Presenter: Ravin Shah ST author: Sumit Singhal, Jagtar Singh Cadence author: Manasi Hate |
| CUSTOM AND ANALOG DESIGN: VERIFICATION | ||
| Date/Time | Title | Presenters/Authors |
| Aug 9th 2023 1:40pm – 2:10pm | High-Speed ΔΣADC Design with Full Cadence Custom Flow for Accurate Results with 2X Performance Gain | ST Presenter: Vaibhav Garg Cadence author: Prayes Jain |
| Aug 9th 2023 3:25pm – 3:55pm | Liberate MX Trio to Enable Memory Characterization for Complex and Third-Party Memory IPs in STMicroelectronics | ST Presenter: Shreyash Tripathi ST author: Sachin Gulyani, Jean-Arnaud Francois Cadence authors: Gudapati Sai Krishna, Swathi M N, Dhanush J |
