ST_POWER_SPC58

ST_POWER_SPC58 training course for board designers and software developers

Duration: 5 days, 7 hours a day

Min/Max number of participants: 3-15

Educational process: Alternating lectures, trainer-driven hands-on practical examples, group interactions with the trainer, and self-reflection time.

Training locations: For dedicated sessions at your training facilities, content can be tailored to further meet your needs. (Contact us for public sessions or public seminars).

Certificate of completion: A certificate of completion is delivered upon completion of the training course.

Prerequisites and related courses: Experience with a processor or DSP is mandatory.

See courses POWER_CPU_E200Z0, POWER_CPU_E200Z425, POWER_CPU_E200Z4D (SPC58H), CVT_AA_CAN, NET_STD_PTP and NET_STD_ETH.

Learning objectives: This course explains the architecture of the SPC58 to enable participants to design a board and implement the integrated memory controllers and peripherals. The following MCUs are covered: SPC58xEx, SPC58xGx, SPC58xNx, SPC58xHx.

Hands-on:

• Based on SPC58NG-DISP board, GCC toolchain and TRACE2 debugger
• Related products & services         
• Board design, schematics review, prelayout review
• SoC performance improvement.
• Bare-metal driver design.

Trainers are also experts able to assist customers throughout the design process

ARCHITECTURE of SPC58XX (1-hour)

• Computational shell
• Peripheral domain
• Memory hierarchy
• Software debug and calibration
• Peripheral buses
• Memory mapping POWER, CLOCKING and RESET (6-hour)
• Power supplies and reference voltages, power-up sequence
  • Power supply monitors
  • External regulators
  • Internal regulator with external ballast
  • Integrated switch mode voltage regulator (SMPS)

• Reset
  • Reset phases
  • Reset generation module
  • Boot assist flash
  • System status and configuration module (SSCM), UTEST flash, DCF records

• Clocking
  • Oscillators
  • PLLs
  • Clock generation modules
  • Clock monitors

• Power management controller digital interface
  • Power control unit (MC_PCU)
  • Mode entry module (MC_ME)

• Wake up unit (WKPU)
• IO pads
  • Hardware configuration
  • GPIO

EMBEDDED MEMORIES (2-hour)

• Platform RAM controller
• Flash memory controller, flash organization
• Erase and program sequence
• Decorated storage memory controller

Practical example: programming a flash erase and programming sequence          

SYSTEM MODULES (5-hour)

• Interconnect parameterizing, introduction to AHB and APB buses
• XBAR switch and XBIC
• PBRIDGE
• System MPU, comparing with CMPU
• SIUL2
• Sharing exclusive resources: SEMA42 unit
• Interrupt controllers, 64 priority levels
• eDMA controller and DMAMUX

Practical example: configuring the eDMA to perform a memory-to-memory transfer triggered by a timer expiration

SAFETY MECHANISMS (3-hour)

• End-to-End ECC
• Lockstep, checker cores

• Cyclic redundancy check (CRC) Unit
• Memory error management unit (MEMU)
• Indirect memory access (IMA)
• Fault collection and control unit (FCCU)
• Self-Test control unit (STCU2)
• Register protection (REG_PROT)

SECURITY (1-hour)

• Password and device security module (PASS)
• Tamper detection module (TDM)
• Hardware security module     ANALOG MODULES (3-hour)
• Overview of the integrated ADCs, sample transfer to memory using DMA channels
• Sigma-delta analog-to-digital converter
• Successive approximation register analog-to-digital converter
• SARADC queued digital interface
• Temperature sensor, determining device temperature
• Decimation filter

Practical example: programming a SAR acquisition sequence

FAST Ethernet controller (2-hour)

• Buffer management, buffer descriptors
• Connection to the PHY
• Auto negotiation
• Received frame filtering
• Runtime statistics
• AVB support
• IEEE1588 frame timestamping

Hardware ACCELERATOR- AMU2 (1-hour)

• High performance floating-point arithmetic calculation engine
• AMU RAM (ARAM) memory storage
• Single-precision exponential function
• DMA channels to access operands and store results           

COMMUNICATION MODULES (4-hour)

• CAN subsystem
• Serial inter-processor interface (SIPI)
• Zipwire
• LVDS Fast asynchronous serial transmission (LFAST)
• FlexRay
• Deserial serial peripheral interface
• Inter-integrated circuit
• Peripheral sensor interface (PSI5)
• SENT receiver (SRX)
• LINFlexD

CALIBRATION AND DEBUG MODULES (2-hour)

• Buddy device
• e200z4256 Core debug support
• Debug and Calibration interface
• JTAG controllers
• Sequence processing unit (SPU)
• Development trigger semaphore (DTS)
• Nexus Aurora router (NAR)
• GTM development interface
• Emulation and debug device introduction