X-CUBE-EEPROM

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EEPROM emulation expansion software for STM32Cube

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Product overview

Description

The microcontrollers in the STM32C0 series, STM32G0 series, STM32G4 series, STM32H5 series, STM32L4 series, STM32L4+ series, STM32L5 series, STM32U0 series, STM32U5 series, STM32WB series, and STM32WL series feature an internal low-power flash memory that is able to store code and data.

The applications in the X-CUBE-EEPROM Expansion Package demonstrate how to emulate an EEPROM using the internal flash memory, thus saving the cost of external components.

For the host board in P-NUCLEO-WB55, a specific example maintaining a Bluetooth® Low Energy connection and communication while processing EEPROM operations is provided. For this example, a mechanism to share the flash memory efficiently between the two STM32WB microcontroller cores is implemented.

For the NUCLEO-H563ZI, an example using the high-cycle data area to perform the EEPROM operations is provided.

For more details, refer to the How to use EEPROM emulation on STM32 MCUs application note (AN4894), available on www.st.com.

  • All features

    • Lightweight implementation and reduced footprint
    • Simple API that consists of a few functions to format, initialize, read and write data, and clean up flash memory pages
      • User-configured EEPROM size
      • Supports 8-bit, 16-bit, and 32-bit variables; supports 96-bit variables for the STM32U5 series
      • Supports high-cycle data area for the STM32H5 series
      • Clean-up simplified for the user (background page erase)
      • Interrupt servicing is possible during program and erase operations
    • At least two flash memory pages to be used for internal data management
    • Wear leveling algorithm to increase emulated EEPROM cycling capability
    • Increased EEPROM memory endurance versus flash memory endurance
    • Robust against asynchronous resets and power failures
    • Optional protection for flash memory sharing between the two cores of the STM32WB series microcontrollers
    • Maintenance of cache coherency

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