Product overview
Key Benefits
New security mechanisms
Enhanced device authentication and anticloning capabilities with Coupling and Chaining Bridge (CCB) and in-factory provisioned attestation. Learn more.
Greater power efficiency
Market-leading efficiency with 117 CoreMark/mW: 5x more efficient vs previous product generations.
Offering essential peripherals and memory capacity
I3C and FDCAN IP for fast connectivity. 256 Kbytes of RAM and 1 Mbyte of flash dual bank.
Description
The STM32U385xx devices belong to an ultra low-power microcontrollers family (STM32U3 series) based on the high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 96 MHz.
The Cortex®-M33 core features a single‑precision FPU (floating‑point unit), that supports all the Arm® single‑precision data‑processing instructions and all the data types.
The Cortex®-M33 core also implements a full set of DSP (digital signal processing) instructions and a MPU (memory protection unit) that enhances the application security.
STM32U3 series are the first STM32 series based on near-threshold voltage technology to deliver breakthrough improvement in battery life. With near-threshold technology, STM32U3 devices reduce the active consumption down to 10uA/MHz, resulting in far longer battery life for any application.
The devices embed high‑speed memories (1‑Mbyte flash memory and 256‑Kbytes SRAM), one Octo/Quad-SPI flash memory interface, an extensive range of enhanced I/Os, peripherals connected to three APB buses, two AHB buses, and a 32‑bit multi‑AHB bus matrix.
The STM32U385xx devices embed several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure proprietary code readout protection, secure, and hide protection areas.
These devices offer two 12-bit ADC (2.5 Msps), two comparators, two operational amplifiers, two DAC channels, an internal voltage reference buffer, a low-power RTC, three general-purpose 32-bit timer, one 16-bit PWM timer dedicated to motor control, three general-purpose 16-bit timers, two basic 16-bit timers and up to four 16-bit low-power timers.
The STM32U385xx devices embed a low-power digital filter dedicated to audio signals (ADF), with one filter supporting sound-activity detection. In addition, up to 21 capacitive sensing channels are available.
STM32U3 series also feature standard and advanced communication interfaces such as:
- Three I2Cs
- Two I3Cs
- Three SPIs and one OCTOSPI
- Two USARTs, two UARTs and one low-power UART
- One SAI
- One SDMMC
- One FDCAN
- One USB full-speed (host, or device)
And several peripherals reinforcing security:
- AES coprocessor with DPA-resistance
- One public key accelerator (PKA), DPA resistant
- One HASH (SHA-256) hardware accelerator
- One true random number generator
- Coupling and chaining bridge (CCB)
The STM32U385xx devices offer high protection against transient and environmental perturbation attacks thanks to several internal monitoring generating secret data erase in case of attack.
The devices operate in the -40 to +105 °C (+110 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.
Some independent power supplies are supported like an analog independent supply input for ADC, DAC, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and up to 14 I/Os, that can be supplied independently down to 1.08 V. A VBAT input is available for connecting a backup battery in order to preserve the RTC functionality and to backup 32 32‑bit registers.
The STM32U385xx devices offer 16 packages from 32-pin to 100-pin.
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All features
- Includes ST state-of-the-art patented technology.
- Ultra-low-power
- 1.71 V to 3.6 V power supply
- -40 °C to +105 °C temperature range
- VBAT mode: supply for RTC, 32 x 32-bit backup registers
- 1.6 μA Stop 3 mode with 8-Kbyte SRAM
- 2.2 μA Stop 3 mode with full SRAM
- 3.8 μA Stop 2 mode with 8-Kbyte SRAM
- 4.5 μA Stop 2 mode with full SRAM
- 9.5 μA/MHz Run mode @ 3.3 V (While(1) SMPS step-down converter mode)
- 13 μA/MHz Run mode @ 3.3 V/48 MHz (CoreMark® SMPS step-down converter mode)
- 16 μA/MHz Run mode @ 3.3 V/96 MHz (CoreMark® SMPS step-down converter mode)
- Brownout reset (BOR) in all modes except shutdown
- Arm® 32-bit Cortex®-M33 CPU with TrustZone® and FPU
- ART Accelerator
- 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories: frequency up to 96 MHz, MPU, 144 DMIPS and DSP instructions
- Power management
- Embedded regulator (LDO) and SMPS step-down converter supporting switch on-the-fly and voltage scaling
- Benchmarks
- 1.5 DMIPS/MHz (Dhrystone 2.1)
- 387 CoreMark®(4.09 CoreMark®/MHz)
- 500 ULPMark™-CP
- 117 ULPMark™-CM
- 202000 SecureMark™-TLS
- Memories
- 1-Mbyte flash memory with ECC, 2 banks read-while-write
- 256 Kbytes of SRAM including 64 Kbytes with hardware parity check
- OCTOSPI external memory interface supporting SRAM, PSRAM, NOR, NAND, and FRAM memories
- Security and cryptography
- Arm® TrustZone® and securable I/Os, memories, and peripherals
- Flexible life cycle scheme with RDP and password protected debug
- Root of trust due to unique boot entry and secure hide protection area (HDP)
- Secure firmware installation (SFI) from embedded root secure services (RSS)
- Secure data storage with hardware unique key (HUK)
- Secure firmware upgrade
- Support of Trusted firmware for Cortex®M (TF-M)
- Two AES coprocessors, one with side channel attack resistance (SCA) (SAES)
- Public key accelerator, SCA resistant
- Key hardware protection
- Attestation keys
- HASH hardware accelerator
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- 512-byte OTP (one-time programmable)
- Antitamper protection
- Clock management
- 4 to 50 MHz crystal oscillator
- 32.768 kHz crystal oscillator for RTC (LSE)
- Internal 16 MHz factory-trimmed RC (±1 %)
- Internal low-power RC with frequency 32 kHz or 250 Hz (±5 %)
- 2 internal multispeed 3 MHz to 96 MHz oscillators
- Internal 48 MHz with clock recovery
- Accurate MSI in PLL-mode and up to 96 MHz with 32.768 kHz, 16 MHz, or 32 MHz crystal oscillator
- General-purpose inputs/outputs
- Up to 82 fast I/Os with interrupt capability most 5 V-tolerant and up to 14 I/Os with independent supply down to 1.08 V
- Up to 15 timers and 2 watchdogs
- 1x 16-bit advanced motor‑control, 3x 32‑bit and 3x 16‑bit general purpose, 2x 16‑bit basic, 4x low‑power 16‑bit timers (available in Stop mode), 2x watchdogs, 2x SysTick timer
- RTC with hardware calendar, alarms, and calibration
- Up to 19 communication peripherals
- 1 USB 2.0 full-speed controller
- 1 SAI (serial audio interface)
- 3 I2C FM+(1 Mbit/s), SMBus/PMBus™
- 2 I3C (SDR), with support of I2C FM+ mode
- 2 USARTs and 2 UARTs (SPI, ISO 7816, LIN, IrDA, modem), 1 LPUART
- 3 SPIs (6 SPIs including 1 with OCTOSPI + 2 with USART)
- 1 CAN FD controller
- 1 SDMMC interface
- 1 audio digital filter with sound-activity detection
- 12-channel GPDMA controller, functional in Sleep and Stop modes (up to Stop 2)
- Up to 21 capacitive sensing channels
- Support touch key, linear, and rotary touch sensors
- Rich analog peripherals (independent supply)
- 2× 12-bit ADC 2.5 Msps, with hardware oversampling
- 12-bit DAC module with 2 D/A converters, low-power sample and hold, autonomous in Stop 1 mode
- 2 operational amplifiers with built-in PGA
- 2 ultralow-power comparators
- CRC calculation unit
- Debug
- Development support: serial-wire debug (SWD), JTAG, Embedded Trace Macrocell™ (ETM)
- All packages are ECOPACK2 compliant.
Circuit Diagram
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All resources
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Product Specifications (1)
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2.0 | 01 Mar 2025 | 01 Mar 2025 |
Application Notes (5 of 54)
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4.0 | 08 Jul 2020 | 08 Jul 2020 | ||
4.0 | 06 Jul 2022 | 06 Jul 2022 | ||
1.1 | 16 Jan 2024 | 16 Jan 2024 | ||
3.0 | 16 Jul 2019 | 16 Jul 2019 | ||
12.0 | 27 Feb 2025 | 27 Feb 2025 | ||
6.0 | 27 Feb 2025 | 27 Feb 2025 | ||
1.0 | 27 Feb 2025 | 27 Feb 2025 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
5.0 | 27 Feb 2025 | 27 Feb 2025 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
4.0 | 04 Oct 2024 | 04 Oct 2024 | ||
23.0 | 27 Feb 2025 | 27 Feb 2025 | ||
7.0 | 09 Dec 2024 | 09 Dec 2024 | ||
2.1 | 11 Jul 2017 | 11 Jul 2017 | ||
3.0 | 17 Aug 2022 | 17 Aug 2022 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
5.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
9.0 | 22 Oct 2024 | 22 Oct 2024 | ||
2.0 | 28 Feb 2025 | 28 Feb 2025 | ||
10.0 | 29 Oct 2024 | 29 Oct 2024 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 14 Mar 2025 | 14 Mar 2025 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
7.0 | 27 Feb 2025 | 27 Feb 2025 | ||
7.0 | 27 Feb 2025 | 27 Feb 2025 | ||
7.0 | 27 Feb 2025 | 27 Feb 2025 | ||
14.0 | 18 Feb 2025 | 18 Feb 2025 | ||
3.0 | 27 Feb 2025 | 27 Feb 2025 | ||
2.0 | 17 Jul 2019 | 17 Jul 2019 | ||
7.0 | 27 Feb 2025 | 27 Feb 2025 | ||
4.0 | 27 Feb 2025 | 27 Feb 2025 | ||
7.0 | 27 Jun 2023 | 27 Jun 2023 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
12.0 | 27 Feb 2025 | 27 Feb 2025 | ||
17.0 | 07 Mar 2025 | 07 Mar 2025 | ||
11.0 | 27 Feb 2025 | 27 Feb 2025 | ||
1.0 | 05 Mar 2025 | 05 Mar 2025 | ||
13.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
2.0 | 28 Feb 2025 | 28 Feb 2025 | ||
1.0 | 27 Feb 2025 | 27 Feb 2025 | ||
15.0 | 06 Feb 2025 | 06 Feb 2025 | ||
3.0 | 29 Mar 2022 | 29 Mar 2022 | ||
3.0 | 28 Jan 2021 | 28 Jan 2021 | ||
65.0 | 17 Feb 2025 | 17 Feb 2025 | ||
1.0 | 19 Feb 2025 | 19 Feb 2025 | ||
8.0 | 07 Nov 2024 | 07 Nov 2024 | ||
19.0 | 05 Feb 2025 | 05 Feb 2025 | ||
17.0 | 17 Feb 2025 | 17 Feb 2025 | ||
1.1 | 11 Jul 2017 | 11 Jul 2017 |
Technical Notes & Articles (5 of 7)
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4.0 | 11 Jul 2017 | 11 Jul 2017 | ||
5.0 | 17 Jul 2024 | 17 Jul 2024 | ||
2.1 | 11 Jul 2017 | 11 Jul 2017 | ||
3.0 | 11 Jul 2017 | 11 Jul 2017 | ||
3.0 | 11 Jul 2017 | 11 Jul 2017 | ||
1.0 | 11 Jul 2017 | 11 Jul 2017 | ||
1.0 | 11 Jul 2017 | 11 Jul 2017 |
Reference Manuals (1)
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1.0 | 27 Feb 2025 | 27 Feb 2025 |
Programming Manuals (1)
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5.0 | 27 Feb 2025 | 27 Feb 2025 |
Errata Sheets (1)
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1.0 | 27 Feb 2025 | 27 Feb 2025 |
Application Notes for related Tools & Software (5 of 14)
Resource title | Version | Latest update | ||
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2.0 | 23 Feb 2018 | 23 Feb 2018 | ||
1.0 | 28 Feb 2025 | 28 Feb 2025 | ||
4.0 | 10 Feb 2022 | 10 Feb 2022 | ||
2.0 | 14 Dec 2020 | 14 Dec 2020 | ||
3.0 | 24 Jul 2020 | 24 Jul 2020 | ||
1.0 | 29 Oct 2019 | 29 Oct 2019 | ||
5.0 | 05 Oct 2021 | 05 Oct 2021 | ||
18.0 | 11 Mar 2025 | 11 Mar 2025 | ||
2.0 | 28 Feb 2025 | 28 Feb 2025 | ||
1.0 | 14 Jan 2020 | 14 Jan 2020 | ||
4.0 | 09 Mar 2023 | 09 Mar 2023 | ||
3.0 | 28 Feb 2023 | 28 Feb 2023 | ||
1.0 | 19 Feb 2025 | 19 Feb 2025 | ||
1.0 | 30 Nov 2021 | 30 Nov 2021 |
Presentations (5)
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1.0 | 19 Feb 2025 | 19 Feb 2025 | ||
1.0 | 20 Jun 2023 | 20 Jun 2023 | ||
1.0 | 21 Mar 2024 | 21 Mar 2024 | ||
1.1 | 02 Dec 2024 | 02 Dec 2024 | ||
1.0 | 14 Mar 2025 | 14 Mar 2025 |
Flyers (3)
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20.0 | 21 Dec 2020 | 21 Dec 2020 | ||
1.0 | 09 Jul 2024 | 09 Jul 2024 | ||
1.0 | 06 Mar 2025 | 06 Mar 2025 |
Brochures (1)
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1.0 | 31 Aug 2022 | 31 Aug 2022 |
Security Bulletin (2)
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1.0 | 19 Nov 2024 | 19 Nov 2024 | ||
1.0 | 28 Jan 2025 | 28 Jan 2025 |
EDA Symbols, Footprints and 3D Models
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BSDL files (1)
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ZIP | 1.0 | 27 Jan 2025 | 27 Jan 2025 |
Quality and Reliability
Part Number | Marketing Status | Package | SMPS | Grade | RoHS Compliance Grade | Material Declaration** |
---|---|---|---|---|---|---|
STM32U385CGT6 | Active | LQFP 48 7x7x1.4 mm | - | Industrial | Ecopack2 | |
STM32U385CGT6Q | Active | LQFP 48 7x7x1.4 mm | - | Industrial | Ecopack2 | |
STM32U385CGU6 | Active | UFQFPN 48 7x7x0.55 mm | - | Industrial | Ecopack2 | |
STM32U385CGU6Q | Active | UFQFPN 48 7x7x0.55 mm | - | Industrial | Ecopack2 | |
STM32U385CGY6QTR | Active | WLCSP 52 3.2x3.1x0.58 P 0.35 mm | Internal | Industrial | Ecopack2 |
STM32U385CGU6
Package:
UFQFPN 48 7x7x0.55 mmMaterial Declaration**:
(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.
Sample & Buy
Part Number | Marketing Status | Budgetary Price (US$)*/Qty | Order from ST | Order from distributors | Package | Packing Type | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | Operating temperature (°C) | Operating Temperature (°C) (max) | D/A Converters (typ) (12-bit) | Timers (typ) (16-bit) | Timers (typ) (32-bit) | Number of Channels (typ) | SMPS | Number of Channels (typ) | UART (typ) | I/Os (High Current) | Integrated op-amps | Comparator | SPI (typ) | USART (typ) | Number of Channels (typ) | I2S (typ) | Advanced Motor Control Timers | CAN (2.0) | CAN (FD) | ||
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min | max | ||||||||||||||||||||||||||||||
STM32U385CGY6QTR | Active | 2.5482 / 10k | distributors No availability of distributors reported, please contact our sales office | WLCSP 52 3.2x3.1x0.58 P 0.35 mm | Tape and Reel | TAIWAN | 5A992.c | NEC | -40 | 85 | 2 | 3 | 3 |
| Internal |
| 1 | 33 | 2 | 2 | 3 | 2 | 10 |
| 1 |
| 1 | ||||
STM32U385CGT6 | Active | 2.6963 / 10k | distributors No availability of distributors reported, please contact our sales office | LQFP 48 7x7x1.4 mm | Tray | CHINA | 5A992.c | NEC | -40 | 85 | 2 | 3 | 3 |
|
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| 1 | 37 | 2 | 2 | 3 | 3 | 11 |
| 1 |
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STM32U385CGT6Q | Active | 2.6963 / 10k | 3 distributors | LQFP 48 7x7x1.4 mm | Tray | CHINA | 5A992.c | NEC | -40 | 85 | 2 | 3 | 3 |
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| 1 | 33 | 2 | 2 | 3 | 3 | 10 |
| 1 |
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STM32U385CGU6Q | Active | 2.6963 / 10k | 3 distributors | UFQFPN 48 7x7x0.55 mm | Tray | CHINA | 5A992.c | NEC | -40 | 85 | 2 | 3 | 3 |
|
|
| 1 | 33 | 2 | 2 | 3 | 3 | 10 |
| 1 |
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| ||||
STM32U385CGU6 | Active | 2.6963 / 10k | distributors No availability of distributors reported, please contact our sales office | UFQFPN 48 7x7x0.55 mm | Tray | CHINA | 5A992.c | NEC | -40 | 85 | 2 | 3 | 3 |
|
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| 1 | 37 | 2 | 2 | 3 | 3 | 11 |
| 1 |
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STM32U385CGY6QTR Active
STM32U385CGT6 Active
STM32U385CGT6Q Active
STM32U385CGU6Q Active
STM32U385CGU6 Active
(*) Suggested Resale Price (USD) per defined quantity for BUDGETARY USE ONLY. For quotes, prices in local currency, please contact your local ST Sales Office or our Distributors