Product overview
Description
STM32H7B0xB devices are based on the high-performance Arm® Cortex®-M7 32-bit RISC core operating at up to 280 MHz. The Cortex® -M7 core features a floating point unit (FPU) which supports Arm® double-precision (IEEE 754 compliant) and single-precision data-processing instructions and data types. STM32H7B0xB devices support a full set of DSP instructions and a memory protection unit (MPU) to enhance application security.
STM32H7B0xB devices incorporate high-speed embedded memories with a flash memory of 128 Kbytes, around 1.4 Mbyte of RAM (including 192 Kbytes of TCM RAM, 1.18 Mbytes of user SRAM and 4 Kbytes of backup SRAM), as well as an extensive range of enhanced I/Os and peripherals connected to four APB buses, three AHB buses, a 32-bit multi-AHB bus matrix and a multi layer AXI interconnect supporting internal and external memory access.
All the devices offer two ADCs, two DACs (one dual and one single DAC), two ultra-low power comparators, a low-power RTC, 12 general-purpose 16-bit timers, two PWM timers for motor control, three low-power timers, a true random number generator (RNG), and a cryptographic acceleration cell and a HASH processor. The devices support nine digital filters for external sigma delta modulators (DFSDM). They also feature standard and advanced communication interfaces.
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All features
- Includes ST state-of-the-art patented technology
- Core
- 32-bit Arm® Cortex®-M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache allowing to fill one cache line in a single access from the 128-bit embedded flash memory; frequency up to 280 MHz, MPU, 599 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Memories
- 128 Kbytes of flash memory plus 1 Kbyte of OTP
- ~1.4 Mbytes of RAM: 192 Kbytes of TCM RAM (inc. 64 Kbytes of ITCM RAM + 128 Kbytes of DTCM RAM for time critical routines), 1.18 Mbytes of user SRAM, and 4 Kbytes of SRAM in Backup domain
- 2x Octo-SPI memory interfaces with on-the-fly decryption, I/O multiplexing and support for serial PSRAM/NOR, Hyper RAM/flash frame formats, running up to 140 MHz in SRD mode and up to 110 MHz in DTR mode
- Flexible external memory controller with up to 32-bit data bus:
- SRAM, PSRAM, NOR flash memory clocked up to 125 MHz in Synchronous mode
- SDRAM/LPSDR SDRAM,
- 8/16-bit NAND flash memory
- CRC calculation unit
- Security
- ROP, PC-ROP, active tamper, secure firmware upgrade support, Secure access mode
- General-purpose input/outputs
- Up to 138 I/O ports with interrupt capability
- Fast I/Os capable of up to 133 MHz
- Up to 164 5 V-tolerant I/Os
- Up to 138 I/O ports with interrupt capability
- Low-power consumption
- Stop: down to 32 µA with full RAM retention
- Standby: 2.8 µA (Backup SRAM OFF, RTC/LSE ON, PDR OFF)
- VBAT: 0.8 µA with RTC and LSE ON
- Clock management
- Internal oscillators: 64 MHz HSI, 48 MHz RC, 4 MHz CSI, 32 kHz LSI
- External oscillators: 4-50 MHz HSE, 32.768 kHz LSE
- 3× PLLs (1 for the system clock, 2 for kernel clocks) with fractional mode
- Reset and power management
- 2 separate power domains, which can be independently clock gated to maximize power efficiency:
- CPU domain (CD) for Arm® Cortex® core and its peripherals , which can be independently switched in Retention mode
- mart run domain (SRD) for reset and clock control, power management and some peripherals
- 1.62 to 3.6 V application supply and I/Os
- POR, PDR, PVD and BOR
- Dedicated USB power embedding a 3.3 V internal regulator to supply the internal PHYs
- Dedicated MMC power supply
- High power efficiency SMPS step-down converter regulator to directly supply VCORE or an external circuitry
- Embedded regulator (LDO) with configurable scalable output to supply the digital circuitry
- Voltage scaling in Run and Stop mode
- Backup regulator (~0.9 V)
- Low-power modes: Sleep, Stop and Standby
- VBAT battery operating mode with charging capability
- CPU and domain power state monitoring pins
- 2 separate power domains, which can be independently clock gated to maximize power efficiency:
- Interconnect matrix
- 5 DMA controllers to unload the CPU
- 1× high-speed general-purpose master direct memory access controller (MDMA)
- 2× dual-port DMAs with FIFO and request router capabilities
- 1× basic DMA with request router capabilities
- 1x basic DMA dedicated to DFSDM
- Up to 35 communication peripherals
- 4× I2C FM+ interfaces (SMBus/PMBus)
- 5× USART/5x UARTs (ISO7816 interface, LIN, IrDA, modem control) and 1x LPUART
- 6× SPIs, including 4 with muxed full-duplex I2S audio class accuracy via internal audio PLL or external clock and 1 x SPI/I2S in LP domain (up to 125 MHz)
- 2x SAIs (serial audio interface)
- SPDIFRX interface
- SWPMI single-wire protocol master I/F
- MDIO Slave interface
- 2× SD/SDIO/MMC interfaces (up to 133 MHz)
- 2× CAN controllers: 2 with CAN FD, 1 with time-triggered CAN (TT-CAN)
- 1× USB OTG interfaces (1HS/FS)
- HDMI-CEC
- 8- to 14-bit camera interface up to 80 MHz
- 8-/16-bit parallel synchronous data input/output slave interface (PSSI)
- 11 analog peripherals
- 2× ADCs with 16-bit max. resolution (up to 24 channels, up to 3.6 MSPS)
- 1× analog and 1x digital temperature sensors
- 1× 12-bit single-channel DAC (in SRD domain) + 1× 12-bit dual-channel DAC
- 2× ultra-low-power comparators
- 2× operational amplifiers (8 MHz bandwidth)
- 2× digital filters for sigma delta modulator (DFSDM), 1x with 8 channels/8 filters and 1x in SRD domain with 2 channels/1 filter
- Graphics
- LCD-TFT controller up to XGA resolution
- Chrom-ART graphical hardware Accelerator (DMA2D) to reduce CPU load
- Hardware JPEG Codec
- Chrom-GRC™ (GFXMMU)
- Up to 19 timers and 2 watchdogs
- 2× 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input (up to 280 MHz)
- 2× 16-bit advanced motor control timers (up to 280 MHz)
- 10× 16-bit general-purpose timers (up to 280 MHz)
- 3× 16-bit low-power timers (up to 280 MHz)
- 2× watchdogs (independent and window)
- 1× SysTick timer
- RTC with sub-second accuracy and hardware calendar
- Cryptographic acceleration
- AES chaining modes: ECB,CBC,CTR,GCM,CCM for 128, 192 or 256
- HASH (MD5, SHA-1, SHA-2), HMAC
- 2x OTFDEC AES-128 in CTR mode for Octo-SPI memory encryption/decryption
- 1x 32-bit, NIST SP 800-90B compliant , true random generator
- Debug mode
- SWD & JTAG interfaces
- 4 Kbytes Embedded Trace Buffer
- 96-bit unique ID
Circuit Diagram
Recommended Tools & Software
All resources
Resource title | Version | Latest update |
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Product Specifications (1)
Resource title | Version | Latest update | ||
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7.0 | 19 May 2022 | 19 May 2022 |
Application Notes (5 of 54)
Resource title | Version | Latest update | ||
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6.0 | 26 Mar 2024 | 26 Mar 2024 | ||
4.0 | 08 Jul 2020 | 08 Jul 2020 | ||
4.0 | 06 Jul 2022 | 06 Jul 2022 | ||
1.1 | 16 Jan 2024 | 16 Jan 2024 | ||
3.0 | 09 Sep 2020 | 09 Sep 2020 | ||
3.0 | 16 Jul 2019 | 16 Jul 2019 | ||
12.0 | 27 Feb 2025 | 27 Feb 2025 | ||
2.0 | 13 Mar 2024 | 13 Mar 2024 | ||
6.0 | 04 Mar 2022 | 04 Mar 2022 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
1.0 | 05 Apr 2018 | 05 Apr 2018 | ||
4.0 | 04 Oct 2024 | 04 Oct 2024 | ||
23.0 | 27 Feb 2025 | 27 Feb 2025 | ||
7.0 | 09 Dec 2024 | 09 Dec 2024 | ||
2.1 | 11 Jul 2017 | 11 Jul 2017 | ||
3.0 | 17 Aug 2022 | 17 Aug 2022 | ||
5.0 | 27 Feb 2025 | 27 Feb 2025 | ||
9.0 | 22 Oct 2024 | 22 Oct 2024 | ||
10.0 | 29 Oct 2024 | 29 Oct 2024 | ||
1.0 | 25 Sep 2023 | 25 Sep 2023 | ||
2.0 | 13 Mar 2024 | 13 Mar 2024 | ||
5.0 | 12 Dec 2024 | 12 Dec 2024 | ||
6.0 | 14 Mar 2024 | 14 Mar 2024 | ||
5.0 | 15 Sep 2020 | 15 Sep 2020 | ||
8.0 | 27 Feb 2025 | 27 Feb 2025 | ||
5.0 | 27 Feb 2025 | 27 Feb 2025 | ||
4.0 | 24 Dec 2019 | 24 Dec 2019 | ||
7.0 | 27 Feb 2025 | 27 Feb 2025 | ||
14.0 | 18 Feb 2025 | 18 Feb 2025 | ||
3.0 | 27 Feb 2025 | 27 Feb 2025 | ||
2.0 | 17 Jul 2019 | 17 Jul 2019 | ||
6.0 | 14 Mar 2024 | 14 Mar 2024 | ||
5.0 | 09 Dec 2024 | 09 Dec 2024 | ||
6.0 | 13 Feb 2025 | 13 Feb 2025 | ||
7.0 | 27 Jun 2023 | 27 Jun 2023 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
12.0 | 27 Feb 2025 | 27 Feb 2025 | ||
17.0 | 07 Mar 2025 | 07 Mar 2025 | ||
11.0 | 27 Feb 2025 | 27 Feb 2025 | ||
13.0 | 27 Feb 2025 | 27 Feb 2025 | ||
10.0 | 27 Feb 2025 | 27 Feb 2025 | ||
2.0 | 07 Mar 2018 | 07 Mar 2018 | ||
6.0 | 28 Oct 2022 | 28 Oct 2022 | ||
2.0 | 28 Jun 2018 | 28 Jun 2018 | ||
15.0 | 06 Feb 2025 | 06 Feb 2025 | ||
3.0 | 29 Mar 2022 | 29 Mar 2022 | ||
3.0 | 28 Jan 2021 | 28 Jan 2021 | ||
65.0 | 17 Feb 2025 | 17 Feb 2025 | ||
7.0 | 30 Jun 2020 | 30 Jun 2020 | ||
1.0 | 27 May 2022 | 27 May 2022 | ||
8.0 | 07 Nov 2024 | 07 Nov 2024 | ||
19.0 | 05 Feb 2025 | 05 Feb 2025 | ||
17.0 | 17 Feb 2025 | 17 Feb 2025 | ||
1.1 | 11 Jul 2017 | 11 Jul 2017 |
Technical Notes & Articles (5 of 7)
Resource title | Version | Latest update | ||
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4.0 | 11 Jul 2017 | 11 Jul 2017 | ||
5.0 | 17 Jul 2024 | 17 Jul 2024 | ||
2.1 | 11 Jul 2017 | 11 Jul 2017 | ||
3.0 | 11 Jul 2017 | 11 Jul 2017 | ||
3.0 | 11 Jul 2017 | 11 Jul 2017 | ||
1.0 | 11 Jul 2017 | 11 Jul 2017 | ||
1.0 | 11 Jul 2017 | 11 Jul 2017 |
User Manuals (3)
Resource title | Version | Latest update | ||
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2.0 | 17 Aug 2023 | 17 Aug 2023 | ||
1.0 | 10 Jan 2024 | 10 Jan 2024 | ||
9.0 | 05 Oct 2023 | 05 Oct 2023 |
Reference Manuals (1)
Resource title | Version | Latest update | ||
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11.0 | 10 Jan 2024 | 10 Jan 2024 |
Programming Manuals (1)
Resource title | Version | Latest update | ||
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5.0 | 20 Jun 2019 | 20 Jun 2019 |
Errata Sheets (1)
Resource title | Version | Latest update | ||
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11.0 | 25 Apr 2022 | 25 Apr 2022 |
Design Notes & Tips (1)
Resource title | Version | Latest update | ||
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1.0 | 19 Sep 2018 | 19 Sep 2018 |
Application Notes for related Tools & Software (5 of 26)
Resource title | Version | Latest update | ||
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2.0 | 15 Mar 2024 | 15 Mar 2024 | ||
2.0 | 23 Feb 2018 | 23 Feb 2018 | ||
1.0 | 28 Feb 2025 | 28 Feb 2025 | ||
5.0 | 06 Apr 2018 | 06 Apr 2018 | ||
4.0 | 10 Feb 2022 | 10 Feb 2022 | ||
2.0 | 14 Dec 2020 | 14 Dec 2020 | ||
3.0 | 24 Jul 2020 | 24 Jul 2020 | ||
1.0 | 29 Oct 2019 | 29 Oct 2019 | ||
10.0 | 22 Aug 2023 | 22 Aug 2023 | ||
5.0 | 05 Oct 2021 | 05 Oct 2021 | ||
1.0 | 28 Nov 2024 | 28 Nov 2024 | ||
9.0 | 22 Oct 2024 | 22 Oct 2024 | ||
18.0 | 11 Mar 2025 | 11 Mar 2025 | ||
2.0 | 28 Feb 2025 | 28 Feb 2025 | ||
1.0 | 09 Apr 2024 | 09 Apr 2024 | ||
8.0 | 20 Dec 2021 | 20 Dec 2021 | ||
7.0 | 27 Sep 2021 | 27 Sep 2021 | ||
1.0 | 14 Jan 2020 | 14 Jan 2020 | ||
4.0 | 09 Mar 2023 | 09 Mar 2023 | ||
3.0 | 28 Feb 2023 | 28 Feb 2023 | ||
3.0 | 07 Aug 2020 | 07 Aug 2020 | ||
7.0 | 30 Jun 2020 | 30 Jun 2020 | ||
1.0 | 30 Nov 2021 | 30 Nov 2021 | ||
6.0 | 07 Sep 2022 | 07 Sep 2022 | ||
1.0 | 27 May 2022 | 27 May 2022 | ||
2.0 | 28 May 2019 | 28 May 2019 |
Presentations (5 of 7)
Resource title | Version | Latest update | ||
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1.0 | 16 Sep 2024 | 16 Sep 2024 | ||
1.0 | 05 Nov 2024 | 05 Nov 2024 | ||
1.0 | 01 Apr 2025 | 01 Apr 2025 | ||
1.0 | 20 Jun 2023 | 20 Jun 2023 | ||
1.0 | 21 Mar 2024 | 21 Mar 2024 | ||
1.1 | 02 Dec 2024 | 02 Dec 2024 | ||
1.0 | 01 Aug 2024 | 01 Aug 2024 |
Flyers (5)
Resource title | Version | Latest update | ||
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20.0 | 21 Dec 2020 | 21 Dec 2020 | ||
1.0 | 09 Jul 2024 | 09 Jul 2024 | ||
20.01 | 27 Feb 2022 | 27 Feb 2022 | ||
1.0 | 28 May 2024 | 28 May 2024 | ||
1.0 | 22 Aug 2023 | 22 Aug 2023 |
Brochures (1)
Resource title | Version | Latest update | ||
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20.09 | 01 Oct 2020 | 01 Oct 2020 |
Security Bulletin (2)
Resource title | Version | Latest update | ||
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1.0 | 19 Nov 2024 | 19 Nov 2024 | ||
1.0 | 28 Jan 2025 | 28 Jan 2025 |
EDA Symbols, Footprints and 3D Models
All resources
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System View Description (1)
Resource title | Version | Latest update | ||
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ZIP | 1.9 | 23 Nov 2023 | 23 Nov 2023 |
IBIS models (1)
Resource title | Version | Latest update | ||
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ZIP | 5.0 | 11 Mar 2024 | 11 Mar 2024 |
BSDL files (1)
Resource title | Version | Latest update | ||
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ZIP | 5.0 | 14 Oct 2024 | 14 Oct 2024 |
Quality and Reliability
Part Number | Marketing Status | Package | Grade | RoHS Compliance Grade | Material Declaration** |
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STM32H7B0VBT6 | Active | LQFP 100 14x14x1.4 mm | Industrial | Ecopack2 | |
STM32H7B0VBT6TR | Active | LQFP 100 14x14x1.4 mm | Industrial | Ecopack2 |
(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.
Sample & Buy
Part Number | Marketing Status | Budgetary Price (US$)*/Qty | Order from ST | Order from distributors | Package | Packing Type | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | Operating temperature (°C) | Operating Temperature (°C) (max) | D/A Converters (typ) (12-bit) | Timers (typ) (16-bit) | Timers (typ) (32-bit) | Number of Channels (typ) | SMPS | Number of Channels (typ) | UART (typ) | I/Os (High Current) | Integrated op-amps | Comparator | SPI (typ) | USART (typ) | Number of Channels (typ) | I2S (typ) | Advanced Motor Control Timers | CAN (2.0) | CAN (FD) | Ethernet | ||
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STM32H7B0VBT6 | Active | 5.1508 / 10k | 4 distributors | LQFP 100 14x14x1.4 mm | Tray | TAIWAN | 5A992.c | NEC | -40 | 85 |
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STM32H7B0VBT6TR | Active | 5.1508 / 10k | distributors No availability of distributors reported, please contact our sales office | LQFP 100 14x14x1.4 mm | Tape and Reel | TAIWAN | 5A992.c | NEC | -40 | 85 |
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STM32H7B0VBT6 Active
STM32H7B0VBT6TR Active
(*) Suggested Resale Price (USD) per defined quantity for BUDGETARY USE ONLY. For quotes, prices in local currency, please contact your local ST Sales Office or our Distributors