製品概要
概要
The M24C64T-FCU is a 64-Kbit I2C-compatible EEPROM (Electrically Erasable PROgrammable Memory) organized as 8 K × 8 bits
The M24C64T-FCU can be hooked on the same bus as the standard M24C64S-FCU and M24C64M-FCU in WLCSP 4 bump, thanks to specific device select code. See Section 4.5: Device addressing.
The M24C64T-FCU can operate with a supply voltage from 1.7 V to 5.5 V, over an ambient temperature range of -40 °C/+85 °C and with an extended supply voltage from 1.6 V to 5.5 V, over a reduced ambient temperature range.
The M24C64T-FCU is delivered in a 4-ball WLCSP package.
-
特徴
- Compatible with the 400 kHz I²C protocol
- High speed 1MHz transfer rate
- Memory array:
- 64 Kbit (8 Kbyte) of EEPROM
- Page size: 32 byte
- Specific device code
- Supply voltage range:
- 1.7 V to 5.5 V
- Operating temperature range
- VCC = 1.7 V to 5.5V over -40°C / +85°C
- VCC = 1.6 V to 5.5V over 0°C / +85°C
- Write
- Byte Write within 5 ms
- Page Write within 5 ms
- Random and sequential Read modes
- Software Write protect
- Upper quarter memory array
- Upper half memory array
- Upper 3/4 memory array
- Whole memory array
- ESD protection
- Human Body Model: 4 kV
- More than 4 million Write cycles
- More than 200-years data retention
- パッケージ
- WLCSP, RoHS and Halogen free compliant (ECOPACK2®)
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STMicroelectronics - M24C64T-FCU
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IBIS models (5 of 11)
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| ZIP | 1.0 | 27 Jun 2024 | 27 Jun 2024 | |
| ZIP | 1.0 | 13 Jan 2023 | 13 Jan 2023 | |
| ZIP | 1.0 | 04 Oct 2021 | 04 Oct 2021 | |
| ZIP | 1.0 | 17 Mar 2023 | 17 Mar 2023 | |
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| ZIP | 1.0 | 25 Jan 2021 | 25 Jan 2021 | |
| ZIP | 1.0 | 25 Jan 2021 | 25 Jan 2021 | |
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| 7Z | 1.1 | 07 Jun 2023 | 07 Jun 2023 | |
| ZIP | 1.0 | 25 Jan 2021 | 25 Jan 2021 | |
| ZIP | 1.0 | 25 Jan 2021 | 25 Jan 2021 |
CAD Symbol & Footprint models (1)
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| ZIP | 1.0 | 27 Apr 2021 | 27 Apr 2021 |
Verilog models (2)
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| ZIP | 1.0 | 28 Jan 2021 | 28 Jan 2021 | |
| ZIP | 1.0 | 22 Jan 2021 | 22 Jan 2021 |
