The SPC56 AP Line of 32-bit Automotive MCUs, based on Power Architecture technology, offers a cost-competitive solution to cover a wide range of motor control, braking and vehicle stability control systems as well as body control modules and hybrid EV/full-hybrid applications.
The SPC56 AP Line features a dual core @64 MHz, with up to 1 Mbyte of Flash memory and timers as well as three CANs and ADCs.
Fully compatible with the SPC56 P Line, ST’s offer ensures scalability for a perfect match with application requirements, leveraging the computational power scalability, the different memory sizes, a scalable set of interfaces and easy software migration between the two lines.
SPC56 P Line and SPC56 AP scalability matrix:
