This course describes the STM32MP15x Asymmetric Multicore SoC
Objectives:
- This course details the hardware implementation of the STM32MP15x SoC
- The course focuses on the boot sequence, the clocking and the power management strategies
- The course explains all parameters that affect the performance of the system in order to easily perform the final tuning
- An overview of the Cortex-A7MP core helps to understand issues caused by MMU, cache and snooping
- An overview of the Cortex-M4F with MPU is included to understand the microcontroller side of the STM32MP15 implementation
- To become more familiar with the synchronization features of the STM32MP15x implementation labs are proposed
Note that this course has been designed from the architecture of STM32MP15x-lines devices, the STM32MP157C.
The peripherals overview presented in this course can be detailed upon request (STM32 Peripherals)
所要時間 | 8 |
所要時間 / 期間 | 8 |
言語 | English, French |
Delivery | Classroom, Online |
ハンズオン | Yes |
対応製品 | STM32MP1 |
トピック | STM32MP15 |
開催地 | France, Germany, Italy, Poland, Spain, UK, USA |
サイト |
Served Countries:
Worldwide