L6364

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Product overview

Description

The L6364 is a dual channel transceiver for industrial sensor applications. It has been designed to support even the IO-Link standard and acts as a bridge between a microcontroller with a sensor or actuator function and a 24 V supply and signaling cable. In normal operation the L6364 is configured at start up by the microcontroller via the SPI interface. Typically, the L6364 then operates as a Single Input Output device driving the output lines as configured by the microcontroller. If the device is connected to an IO-Link master, then the master can initiate communication and exchange data with the microcontroller while the L6364 acts as a physical layer for the communication.The L6364 integrates a surge pulse suppressor circuit featuring the protection of the process side pins (VPLUS, CQ, DIO, PGND) against up to ±1.5 kV/50 us withstand pulses applied with 500 Ω coupling. Also, the same pins are protected against reverse polarity (Surge pulse and reverse polarity protections). The two symmetrical input/output stages (CQ and DIO) can be used either for the communication through the 24 V data bus or to drive industrial loads. Each output stage can be configured (Hi-Z, High Side, Low Side, Push-Pull) and protected against overload by the ISET programmable threshold (110 mA to 250 mA). Also, the JOIN mode configuration allows to reduce power dissipation and to double overload threshold by shorting CQ and DIO on the application. The IC embeds two linear regulators (V3V3 and V5V) than can work either directly supplied by the external supply rail (VPLUS) or by the high efficiency and configurable (VSET, fSET) embedded DC-DC converter. The output voltage of the DC-DC can be used as additional supply rail for the application. The total current capability (IOUT) of the internal regulators and DC-DC is 50 mA. The logic core of the IC is internally supplied by the V3V3 rail and communicates with the external microcontroller by an SPI (slave) interface, an interrupt signal (INT) and direct driving of DIO line (CTLD). The VDIG pin defines the voltage rail of these digital signals: it enables the IC to work even with microcontroller supplied by different rails than V3V3. The internal logic embeds an IO-Link UART peripheral that can be configured by the microcontroller in one of the three possible options: Transparent, Single-octet or Multi-octet (IO-Link UART peripheral). In Transparent mode the IC works purely as a physical layer between the microcontroller and the 24 V data bus: the workload for the management of the input/output data is fully demanded to the firmware running on the microcontroller. In Single-octet and Multi-octet modes the IC itself does a set of IO-Link required checks on the input/output data with consequent drastic reduction of the workload for the microcontroller. The Multi-octet is usually preferred when the data transfer with the IO-Link master can be managed by the available 8-bits registers buffer: the IC generates an interrupt to microcontroller when all data in the buffer are ready. If IO-Link data transfer exceeds the IC buffer capability, then Single-octet can be used instead: in this case the IC generates an interrupt at every octet ready. The L6364 offers two programmable pins (LED1 and LED2) acting as LED drivers with configurable current capability (up to 8 mA, each).

All features
Supply voltage from 5 V to 35 V

2.5 V to 5 V compatible I/Os

3.3 V and 5 V, 50 mA linear regulators

50 mA DC-DC regulator with configurable frequency (0.5 MHz to 2 MHz) & voltage (5 V to 10.5 V)

Low dissipative (5 Ω) CQ and DIO output stages configurable in high side, low side, push/pull

Configurable reporting threshold (0.11 A to 0.25 A) of current limitation for CQ and DIO lines

Configurable reporting threshold (0.22 A to 0.5 A) of current limitation for CQ//DIO line (Join Mode)

Fully protected:

Embedded reverse polarisation diode (D_OUT pin)

Full zero current reverse polarity between V_PLUS, CQ, DIO and PGND pins

Configurable (up to 216°C) thermal shutdown threshold

7-bit, calibrated, temperature measurement

Configurable (6.0 V to 15 V) V_PLUS undervoltage detection

CQ and DIO short-circuit current limit and reporting

-40 to +150°C operating temperature

Suitable to drive L, C and R loads
Quartz-free IO-Link clock extraction and timing generation at COM2 (38.4k Baud) and COM3 (230.4k Baud)

Integrated UART peripheral with M-sequence handling (inc. checksum) for all IO-Link sequences according to specification v1.1

Multi octet UART mode for M-sequence size up to 15 octets

Single octet UART mode for unlimited M-sequence size and continuous data transfer

Transparent UART mode for special applications

CQ and DIO switching time = 100 ns (2 kΩ//2.2 nF load)

8 V Zener limits for fast demagnetization of inductive loads

Two LED drivers with configurable (up to 8 mA) current

Design to meet application requirements:

ESD IEC 61000-4-2 protection to 4 kV

EMC protection against surge (500 Ω coupling) above ±2A/50 μs

Smart format QFN-20L 4x4 mm and CSP-19 2.5x2.5 mm packages
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